Recent talks

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2011

2011/10/25ATL with strategy contextsWorkshop GIPSy (Rennes, France)
2011/09/17ATL and extensionsLogICCC final conference (Berlin, Germany)
2011/09/10Quantified CTL model checkingGASICS'11 (Aachen, Germany)
2011/06/15Robustness in Real-Time SystemsSIES'11 (Västerås, Sweden)
2011/04/08Verification of Embedded Systems — Algorithms and ComplexityHabilitation defense (Cachan, France)
2011/02/15ATL with strategy contextsSeminar (Aachen, Germany)

2010

2010/12/17Computing Rational Radical Sums in Uniform TC0FSTTCS'10 (Chennai, India)
2010/12/15ATL with strategy contextsFSTTCS'10 (Chennai, India)
2010/12/09ATL with strategy contextsSeminar (Rennes, France)
2010/03/03Timed temporal logicsQMC school (Copenhagen, Denmark)
2010/03/03Weighted timed automataQMC school (Copenhagen, Denmark)
2010/02/02Nash equilibria in concurrent and timed gamesSeminar (Aachen, Germany)

2009

2009/02/25Infinite Runs in Weighted Timed Automata with Energy ConstraintsSeminar (Konstanz, Germany)

2008

2008/09/15Infinite Runs in Weighted Timed Automata with Energy ConstraintsFORMATS'08 (St Malo, France)
2008/06/23Timed Systems -- Model Checking and GamesMOVEP'08 (Nouan le Fuzelier, France)
2008/06/16Good Friends are Hard to Find!TIME'08 (Montréal, QC, Canada)
2008/02/07Robust Model Checking via Channel AutomataTresor Seminar (EPFL, Lausanne, Switzerland)

2007

2007/10/26Robust Analysis of Timed AutomataCFV seminar (ULB, Brussels, Belgium)
2007/10/04Costs are Expensive!FORMATS'07 (Salzburg, Austria)
2007/09/05Implementability of Timed ControllersETR'07 (Nantes, France)
2007/02/05Verifying (1-clock) priced timed automataGroupe de travail 'Vérification' (LIAFA, Paris, France)
2007/02/01Verifying (1-clock) priced timed automataGroupe de travail MVTsi (LaBRI, Bordeaux, France)

2006

2006/12/15Almost optimal strategies in 1-clock priced timed automataFSTTCS'06 (Kolkata, India)
2006/12/01Verifying (1-clock) priced timed automataConcurrency Seminar (OUCL, Oxford, UK)
2006/10/18Verification of Multi-Agent Systems with ATLFNRS day "Synthesis and Verification" (ULB, Brussels, Belgium)
2006/07/31Expressiveness of Temporal LogicsESSLLI'06 (Malaga, Spain)
2006/03/14On the expressiveness and complexity of ATL"Recherches en vérification automatique" days (LSV, Cachan, France)
2006/02/16On the expressiveness of TPTL and MTLSeminar of the Computer Science Dept. (ULB, Brussels, Belgium)

2005

2005/12/17On the expressiveness of TPTL and MTLFST&TCS'05 (Hyderabad, India)
2005/12/12On the expressiveness of TPTL and MTLGroupe de travail 'Vérification' (LIAFA, Paris, France)

2004

2004/09/23Symbolic Model Checking for Simply Timed SystemsFORMATS+FTRTFT'04 (Grenoble, France)
2004/09/01Model Checking Restricted Sets of Timed PathsCONCUR'04 (London, UK)
2004/05/03Path model checkingGroupe de travail 'Vérification' (LIAFA, Paris, France)
2004/04/22Path model checkingVERIMAG seminar (VERIMAG, Grenoble, France)
2004/03/19Model Checking Restricted Sets of Timed PathsCFV seminar (ULB, Brussels, Belgium)
2004/01/29Model Checking a PathSeminar 68NQRT (IRISA, Rennes, France)

2003

2003/09/04Model checking a pathCONCUR'03 (Marseille, France)
2003/04/03Logiques temporelles pour la vérification : expressivité, complexité, algorithmesPhD defence (LIFO, Orléans, France)
2003/02/11Temporal Logics with Forgettable PastANU Seminar (ANU, Canberra, Australia)

2002

2002/11/08Temporal Logics with Forgettable PastSeminar 68NQRT (IRISA, Rennes, France)
2002/08/19Past is for Free: on the Complexity of Verifying Linear Temporal Properties with PastEXPRESS'02 (Brno, Czech Republic)
2002/04/12On Model-Checking Durational Kripke StructuresFoSSaCS'02 (Grenoble, France)
2002/03/18Temporal Logics with Forgettable PastGroupe de travail 'Vérification' (LIAFA, Paris, France)

2001

2001/04/04Model-checking CTL+ and FCTL is hardFoSSaCS'01 (Genoa, Italy)

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