Selected publications by Ulrich Kühne
Journals
Conferences
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L. Fribourg and U. Kühne. Parametric Verification and Test Coverage for Hybrid Automata Using the
Inverse Method. In RP'11, LNCS 6945, pages 191-204. Springer, 2011. ( PDF | BibTeX + Abstract )
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U. Kühne, S. Beyer, J. Bormann and J. Barstow. Automated Formal Verification of Processors Based on Architectural
Models. In FMCAD'10, pages 129-136. IEEE Computer Society Press, 2010. ( PDF | BibTeX + Abstract )
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U. Kühne, S. Beyer and Ch. Pichler. Generating an Efficient Instruction Set Simulator from a Complete
Property Suite. In RSP'09, pages 109-115. IEEE Computer Society Press, 2009. ( PDF | BibTeX + Abstract )
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A. Sülflow, U. Kühne, G. Fey, D. Große and R. Drechsler. WoLFram - A Word Level Framework for Formal Verification. In RSP'09, pages 11-17. IEEE Computer Society Press, 2009. ( PDF | BibTeX + Abstract )
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D. Große, R. Wille, U. Kühne and R. Drechsler. Contradictory antecedent debugging in bounded model checking. In GLSVLSI'09, pages 173-176. ACM Press, 2009. ( PDF | BibTeX + Abstract )
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U. Kühne, D. Große and R. Drechsler. Property Analysis and Design Understanding. In DATE'09, pages 1246-1249. IEEE Computer Society Press, 2009. ( PDF | BibTeX + Abstract )
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A. Sülflow, G. Fey, C. Braunstein, U. Kühne and R. Drechsler. Increasing the Accuracy of SAT-Based Debugging. In DATE'09, pages 1326-1331. IEEE Computer Society Press, 2009. ( PDF | BibTeX + Abstract )
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U. Kühne, D. Große and R. Drechsler. Property Analysis and Design Understanding in a Quality-Driven Bounded
Model Checking Flow. In MTV'08, pages 88-93. IEEE Computer Society Press, 2008. ( PDF | BibTeX + Abstract )
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A. Sülflow, G. Fey, S. Frehse, U. Kühne and R. Drechsler. Computing Bounds for Fault Tolerance using Formal Techniques. In DRV'08. IEEE Computer Society Press, 2008. ( PDF | BibTeX + Abstract )
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U. Kühne, D. Große and R. Drechsler. Improving the Quality of Bounded Model Checking by Means of Coverage
Estimation. In ISVLSI'07, pages 165-170. IEEE Computer Society Press, 2007. ( PDF | BibTeX + Abstract )
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D. Große, U. Kühne and R. Drechsler. Estimating Coverage in Bounded Model Checking. In DATE'07, pages 1176-1181. ACM Press, 2007. ( PDF | BibTeX + Abstract )
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D. Große, U. Kühne and R. Drechsler. HW/SW Co-Verification of Embedded Systems using Bounded
Model Checking. In GLSVLSI'06, pages 43-48. ACM Press, 2006. ( PDF | BibTeX + Abstract )
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U. Kühne and N. Drechsler. Finding Compact BDDs Using Genetic Programming. In EvoWorkshops'06, LNCS 3907, pages 308-319. Springer, 2006. ( PDF | BibTeX + Abstract )
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D. Große, U. Kühne and R. Drechsler. HW/SW Co-Verification of a RISC CPU using Bounded Model
Checking. In MTV'05, pages 133-137. IEEE Computer Society Press, 2005. ( PDF | BibTeX + Abstract )
Theses
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U. Kühne. Advanced Automation in Formal Verification of Processors. Ph.D. Thesis, Universität Bremen, Germany, September 2009. ( BibTeX )
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U. Kühne. Modellierung und Verifikation eines RISC-Prozessors. Diploma thesis, Universität Bremen, Germany, 2006. ( BibTeX )
Other Publications
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É. Florentin, L. Fribourg, U. Kühne, S. Lefebvre and Ch. Rey. COUPLET: Coupled Electrothermal Simulation. Research Report LSV-11-18, Laboratoire Spécification et Vérification, ENS Cachan,
France, June 2011. 32 pages. ( PDF | BibTeX + Abstract )
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É. André, R. Soulat and U. Kühne. Imitator II, 2011. ( Web page | BibTeX + Abstract )
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L. Fribourg and U. Kühne. Parametric Verification of Hybrid Automata Using the Inverse Method. Research Report LSV-11-04, Laboratoire Spécification et Vérification, ENS Cachan,
France, March 2011. 25 pages. ( PDF | BibTeX + Abstract )
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G. Fey, A. Sülflow, S. Frehse, U. Kühne and R. Drechsler. Formaler Nachweis der Fehlertoleranz von Schaltkreisen. In ZuE'08. VDE Verlag, 2008. ( PDF | BibTeX + Abstract )
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D. Große, R. Wille, U. Kühne and R. Drechsler. Using Contradiction Analysis for Antecedent Debugging in Bounded Model
Checking. In Proceedings of the 11th ITG/GMM/GI Workshop
"Methoden und Beschreibungssprachen zur Modellierung und
Verifikation von Schaltungen und Systemen", Freiburg im
Breisgau, Germany, March 2008, pages 169-178. Shaker Verlag, 2008. ( BibTeX )
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A. Sülflow, U. Kühne, R. Wille, D. Große and R. Drechsler. Evaluation of SAT like Proof Techniques for Formal Verification of
Word Level Circuits. In WRTLT'07. IEEE Computer Society Press, 2007. ( PDF | BibTeX + Abstract )
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D. Große, U. Kühne and R. Drechsler. Formale Verifikation des Befehlssatzes eines in SystemC
modellierten Mikroprozessors. In INFORMATIK'05, Lecture Notes in Informatics 67, pages 308-312. Gesellschaft für Informatik, 2005. ( BibTeX )
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D. Große, U. Kühne, C. Genz, F. Schmiedle, B. Becker, R. Drechsler and P. Molitor. Modellierung eines Mikroprozessors in SystemC. In Proceedings of the 8th ITG/GMM/GI Workshop
"Methoden und Beschreibungssprachen zur Modellierung und
Verifikation von Schaltungen und Systemen", Munich,
Germany, April 2005. 2005. ( BibTeX )